This paper describes the next-generation Intels Xeons microprocessor designed for a broad range of highly power-efficient servers, codename Dunnington. The Dunnington processor has six cores (three core-pairs) integrated with large, dense, on-chip caches, and it delivers the dramatic power efficiency of Intel’s 45nm high-K metal gate process and the Intel Core 2 microarchitecture to server platforms. This processor implements a high bandwidth-dedicated interface from each of the three core pairs to the last-level cache (LLC) for the effective use of the inclusive LLC. With high functional integration, large cache size, and 1.9 billion transistors, the processor’s moderate server-class die size of 503mm2 is achieved by optimizing the floor plan and physical design. Thermal Design Power (TDP) limits of 50, 65, 90, and 130W. This processor will be the first part to employ core recovery techniques for reducing product cost

Xeon, six cores, Dunnington, 45nm

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