Efficient Method to Measure Dynamic Temperature Variations in an Non Uniform Heat Dissipated Integrated Chip
Yasha Jyothi M Shirur1
Section:Research Paper, Product Type: Journal Paper
Volume-7 ,
Issue-6 , Page no. 1082-1087, Jun-2019
CrossRef-DOI: https://doi.org/10.26438/ijcse/v7i6.10821087
Online published on Jun 30, 2019
Copyright © Yasha Jyothi M Shirur . This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
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IEEE Style Citation: Yasha Jyothi M Shirur, “Efficient Method to Measure Dynamic Temperature Variations in an Non Uniform Heat Dissipated Integrated Chip,” International Journal of Computer Sciences and Engineering, Vol.7, Issue.6, pp.1082-1087, 2019.
MLA Style Citation: Yasha Jyothi M Shirur "Efficient Method to Measure Dynamic Temperature Variations in an Non Uniform Heat Dissipated Integrated Chip." International Journal of Computer Sciences and Engineering 7.6 (2019): 1082-1087.
APA Style Citation: Yasha Jyothi M Shirur, (2019). Efficient Method to Measure Dynamic Temperature Variations in an Non Uniform Heat Dissipated Integrated Chip. International Journal of Computer Sciences and Engineering, 7(6), 1082-1087.
BibTex Style Citation:
@article{Shirur_2019,
author = {Yasha Jyothi M Shirur},
title = {Efficient Method to Measure Dynamic Temperature Variations in an Non Uniform Heat Dissipated Integrated Chip},
journal = {International Journal of Computer Sciences and Engineering},
issue_date = {6 2019},
volume = {7},
Issue = {6},
month = {6},
year = {2019},
issn = {2347-2693},
pages = {1082-1087},
url = {https://www.ijcseonline.org/full_paper_view.php?paper_id=4684},
doi = {https://doi.org/10.26438/ijcse/v7i6.10821087}
publisher = {IJCSE, Indore, INDIA},
}
RIS Style Citation:
TY - JOUR
DO = {https://doi.org/10.26438/ijcse/v7i6.10821087}
UR - https://www.ijcseonline.org/full_paper_view.php?paper_id=4684
TI - Efficient Method to Measure Dynamic Temperature Variations in an Non Uniform Heat Dissipated Integrated Chip
T2 - International Journal of Computer Sciences and Engineering
AU - Yasha Jyothi M Shirur
PY - 2019
DA - 2019/06/30
PB - IJCSE, Indore, INDIA
SP - 1082-1087
IS - 6
VL - 7
SN - 2347-2693
ER -
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Abstract
According to Moore’s law, the number of transistors on a chip roughly doubles every 2 years. As a result, the current technology accommodates more number of transistors; almost a billion. In System on Chip (SoC), the multiple processor & logic inside the chip are driven at high clock frequency, which in turn dissipates more power, especially at the clock edge. As these trends continue, the power dissipation will become more and more difficult to manage. This increasing power density makes the device more power sensitive in turn creates a huge problem related to heat dissipation. The heat dissipation is not uniform throughout the chip creating hot spots. Hot spots have adverse impact on the performance and reliability of the chip. Recent data shows that more than 50% of all IC failures are related to temperature issue. In this paper two different approaches (ring oscillator & leakage based inverter circuit) were tried out to measure the sensitivity of the dynamic temperature variations. The proposed leakage current based circuit has given dimensionless sensitive value equal to 0.7957 in the scale down technology when compared to ring oscillator dynamic temperature sensor which is 0.076 which is almost 10 times less than of leakage. The other advantage of the leakage current based circuit is it can be built with minimum number of transistors. This circuit can be used in large number to measure the temperature through the chip and integrated to control the area were the heat dissipation is more. The entire set up is simulated and verified in 180ɳm & 45ɳm technological libraries from TSMC to check the scalability
Key-Words / Index Term
System on Chip (SoC), TSMC, threshold voltage, mobility sub threshold current, drain current and saturation velocity
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